CH1788
Surface Mount PLCC 2400bps Modem
INTRODUCTION
The CH1788 modem has the smallest footprint and
lowest profile of any commercially available full
function, FCC Part 68 approved 2400bps modem.
Utilizing a 68 pin PLCC form factor and requiring a
minimum amount of PCB space (0.95”x0.95”x
0.255”), the CH1788 affords the design engineer
and 300bps.
maximum flexibility.
The CH1788 provides two
external interfaces: a ITU-T V.24 standard 5 volt
serial interface for routing directly to a UART; and a
TIP and RING interface for connection to the PSTN
telephone line.
The CH1788 is compatible with
support with external circuitry.
available industry communication software or may be
controlled with software commands via an embedded
microcontroller.
CH1788.
The
CH1788
modem
supports
asynchronous
operation at 2400bps, 1200bps, and 300bps to both
Bell and ITU-T standards.
Each device is FCC
power idle and zero power standby modes.
approved and Canadian DOT approvable. An FCC
label is supplied. The CH1788 also meets UL 1950
Edition 3 requirements.
standard 68 pin PLCC socket.
The CH1788 family of modems operate from a 5 volt
DC supply (3.3 volt devices are available by special
order). The combination of low power operation, zero
power standby mode and small form factor make the
CH1788 FAMILY
CH1788 an ideal choice for portable equipment
CH1788
Operating Temperature:
0 ° C to +70 ° C
CH1788ET
Operating Temperature:
-40 ° C to +85 ° C
CH1788-3
3.3 volt Operation
Operating Temperature:
0 ° C to +70 ° C
CH1788-3ET
3.3 volt Operation
Operating Temperature:
-40 ° C to +85 ° C
DESCRIPTION OF FUNCTIONAL BLOCKS
applications.
AND DISCUSSION OF BASIC OPERATIONS
Figure 1 contains a functional block drawing of the
CH1788. The CH1788 is a highly integrated, full-
Figure 1. Functional Block Diagram of CH1788.
function
modem,
comprised
of
a
modulator/
demodulator, controller, and an FCC Part 68
approved telephone line interface.
FEATURES
Modulation/Demodulation and Modem Controller.
Bell 212, and Bell 103, Bell 202, V.23.
This function is provided by a monolithic modem
integrated circuit. The function is performed to ITU-T
standards thereby making the CH1788 compatible
2006 Cermetek Microelectronics, Inc.
Page 1
Document No. 607-0018 Revision A6 (01/06)
Cermetek Microelectronics, Inc.
CH1788 Surface Mount PLCC 2400bps Modem
with all modems.
The ability to execute AT
the data connection DCE speed will be equivalent to
commands is consistent with industry standards.
the originating modems serial connection DTE speed.
In other words, disabling Speed Buffering forces the
Telephone Line Interface or DAA. The CH1788 is
answering modem to connect with a DCE speed
designed to meet 1500VAC RMS isolation and
equivalent to the serial DTE speed of the originating
provide 2122V peak surge protection. Consequently,
modem.
the CH1788 satisfies North American and some
international requirements. Note that supplemental
Data Transmission Speed. The CH1788 allows the
protection is required for FCC Part 68 conveyed
DTE speed to be set to 300, 1200, 2400, or 9600bps.
approval (see Figure 3 of this document).
This
The DCE speed can be set to 2400, 1200, or 300bps.
supplemental protection also improves field reliability
A connect message will appear on RXD indicating the
and facilitates FCC part 15 approval.
connected data rate.
General Operation.
By definition, the originating
SUPPORTED FEATURES
modem initiates the PSTN connection and the
AT Command Set. Internal to the CH1788 is an AT
answering modem accepts the incoming call. The
command interpreter.
AT commands and their
connectivity speed (i.e., DCE speed) is determined by
associated S-registers provide macro functionality.
the originating modem.
These commands are summarized in this document
and are detailed in Cermetek publication CH1788 AT
The originating modem’s DTE speed is established,
Command and S-Register Reference Guide.
in turn, with an initializing AT command issued by the
application’s host controller. Speed Buffering allows
The CH1788 supports command concatenation. A
the CH1788 to communicate with the host controller
maximum of 63 characters (excluding AT ) may be
at a DTE speed that is greater than the connect DCE
included on each command line. S-registers provide
speed.
added programmability by allowing key parameters to
be configured for a specific application.
Assuming that the default configuration of the
CH1788 has not been modified with the ATB or ATY0
Serial Host Interface.
The serial interface is a
commands, the answering modem will attempt to
standard TTL V.24 5V DC interface. It is functionally
connect to the originating modem at the highest
similar to an RS232 interface.
possible data rate supported by the originating
modem. The connection rate can be less than the
IMPORTANT NOTE
maximum of 2400bps, for example, if the PSTN line is
Do not use RS232 interface voltage levels on the
impaired in some way.
serial pins. Damage may result. Adhere to the TTL
V.24 5V DC interface standard. See Schematic 7
By default upon power up, the CH1788 DTE speed is
for a suggested circuit to interface RS-232 logic to
set to 9600bps and Speed Buffering is enabled.
the CH1788 TTL V.24 logic.
Typical
Implementation.
In
a
typical
implementation, the CH1788 has a DTE speed of
Command Characters. Each data byte or command
9600bps and will connect to the remote modem at a
character consists of ten bits: 1 start bit, 1 stop bit,
DCE speed of 2400bps. Speed Buffering allows the
and eight data bits. The data bits can be either eight
CH1788 to negotiate the DCE speed independent of
bits with no parity or seven odd or even with 1 parity
the DTE speed. Data transfer to the host will be at
bit. The start bit is LOW going. RXD and TXD data is
the DTE Speed Buffered rate of 9600bps. In this
non-inverted. See the pin descriptions in Table 2.
case, flow control is not required.
Data Encoding.
The data encoding is user
It is possible for the DTE speed to be slower than the
configurable. The ATB command sets the decoding.
DCE speed.
For example, a serial interface DTE
The following ITU-T standards are supported:
speed of 1200 bps and a data rate DCE speed of
V.22bis, V.22, Bell 212A, 103, Bell 202 or V.23.
2400 bps.
In this case, flow control must be
employed by the host to prevent buffer overflow and
Speed Buffered Mode. Speed Buffering allows the
lost data.
serial data interface or DTE speed (i.e., the speed
between the host microcontroller and the CH1788) to
be fixed regardless of the connect or DCE speed (i.e.,
the speed between the CH1788 and the remote
POWER DOWN
modem).
The CH1788 has two power down modes: idle power
standby and zero power standby.
The option exists to disable Speed Buffering by using
the ATY0 command. If Speed Buffering is disabled,
2006 Cermetek Microelectronics, Inc.
Page 2
Document No. 607-0018 Revision A6 (01/06)
Cermetek Microelectronics, Inc.
CH1788 Surface Mount PLCC 2400bps Modem
Idle Power Standby. In idle power standby mode is
including ground, does not exceed 50 mV peak to
enabled by executing ATS73+2 in the set up string.
peak. Any frequency between 20 kHz and 150 kHz
Power is switched off automatically by the CH1788
must be less than 500 micro volts peak. If necessary,
after a period of no activity and is restored
use dedicated power and ground planes. Failure to
automatically by the CH1788 when activity is again
provide such operating conditions could cause the
detected. Activity is defined as a change of status on
CH1788 to malfunction or to function erratically.
DTR, TXD, RST or on any of the other input pins or
an Incoming Ringing signal on TIP/RING. Idle power
Recommendation. To reduce the effects of supply
mode transitions are transparent to the user.
noise, it is recommended that by-pass capacitors be
placed on the power supply as close to the CH1788’s
Zero Power Standby. In applications requiring near
supply input (i.e., Pin 20) as practical.
A 10 µ F
zero power during standby periods, the power may be
Tantalum capacitor in parallel with a 0.01 µF ceramic
switched completely off to the CH1788. This is done
is recommended.
by issuing the AT@Z command or by toggling DTR
after the ATR5 command has been executed.
Normal operation is resumed by performing a 50
DTMF TONE DETECTION
msec (minimum) hardware reset on the RST pin.
The CH1788 is capable of detecting DTMF tones
without external hardware.
RING INDICATION
Setup. Detection will only occur when the CH1788 is
The CH1788 produces a low going 80 msec pulse on
Off-Hook and in the command mode.
the RI Pin when a valid Incoming Ring signal is
detected.
By default, a valid ring signal must fall
DTMF Decoding.
The ATJ6 command enables
within the 10-75 Hz range and have a cadence of 2
DTMF decoding.
Register S65 will contain the
seconds on and 4 seconds off. Alternate frequency
decoded DTMF result.
The S65 register must be
ranges and ring cadence’s may be programmed.
continuously interrogated by the host controller
because the decoded DTMF decimal value is only
present in S65 when the DTMF tones are present on
CH1788 RESET
the PSTN line.
The CH1788 may be reset using any of the following
methods. Delay sending commands to the CH1788
The full range of decoded DTMF decimal values are
for a period of 500 msec after reset has been
listed in Table 1. If the S65 register contains zero, it
completed to allow the CH1788 time to properly
indicates that no DTMF tones are present. Note, the
reconfigure.
S65 register will contain zero between DTMF tones.
Hardware Reset. Upon power-up or when power
Recommendation. Sample the S65 register at a
cycling, the CH1788 will automatically generate an
rate at least twice (2X) the fastest DTMF tone
internal reset pulse. However, if the power supply
periodic rate. DTMF tones typically have a cadence
comes up too slowly, or has a rise time greater than
of 70 msec on and 70 msec off. In this case, the S65
50 msec, the internal reset detection circuitry may not
register should be sampled at least every 35 msec.
generate the hardware reset.
Table 1. DTMF Tone Conversion.
RST Pin. Initiate a reset externally anytime after the
DTMF TONE
DECIMAL VALUE
power supply has stabilized by applying a 50 msec
1
129
TTL high reset pulse to the RST pin.
2
130
Software Reset. Execute the ATZ command while in
3
131
command mode.
4
132
DTR Pin. Toggle the DTR pin after executing the
5
133
ATR3 command while in command mode.
6
134
7
135
POWER SUPPLY
8
136
Although any standard 5 volt DC supply is
9
137
acceptable, the user should be aware that during the
0
138
course of normal operation the CH1788 decodes
*
139
analog data signals from the PSTN line that are in the
millivolt range. Steps must be taken by the user to
#
140
insure that power supply noise on all supply lines,
No Tone
0
2006 Cermetek Microelectronics, Inc.
Page 3
Document No. 607-0018 Revision A6 (01/06)
Cermetek Microelectronics, Inc.
CH1788 Surface Mount PLCC 2400bps Modem
DTMF TONE GENERATION
Setup. The LIU feature requires additional external
The CH1788 is capable of generating DTMF tones
circuitry.
See Schematic 5 and Schematic 6.
without external hardware. DTMF tone generation is
Additionally, register S110 must be set to 243.
useful for signaling and is supplemental to the DTMF
dialing capability.
PARALLEL PICK-UP
The Parallel Pick-Up (i.e., PIU) feature allows the
Setup. Generation will only occur when the CH1788
termination of a CH1788 modem call in progress, and
is Off-Hook, in the command mode and prior to
then allows a standard phone instrument sharing the
carrier generation.
same PSTN line to seize the line and obtain a dial
tone. When terminating the modem call, DCD will go
DTMF Encoding. By default, the CH1788 generates
high, if enabled. The PPU-V status message appears
DTMF tones at a 70 msec on/off cycle. The cycle can
on RXD.
be modified with register S11.
Setup. The Parallel Pick-Up feature requires external
Issuing an ATDT command string with the desired
circuitry. See Schematic 5.
DTMF digits and terminating the command string with
a semicolon ( ; ) will cause the CH1788 to immediately
Operation. The Parallel Pick-Up circuit detects the
enter command mode after dialing. Alternatively, the
incremental change in Off-Hook voltage on the PSTN
command mode may be entered from the data mode
line. If a parallel connected phone instrument is Off-
by issuing the escape sequence ( +++ ) to the
Hook, the CH1788 will not attempt to go Off-Hook. If
CH1788.
the CH1788 is already Off-Hook and a parallel
connected phone instrument goes Off-Hook, the
Enter:
ATDT1234567890*#;<CR>
CH1788 will terminate the calling progress and allow
Result:
Sends the DTMF tones and returns to
the sharing device to seize the line.
command mode.
DO not exceed 63
characters on the command line.
Failure To Detect.
The detection circuit in the
CH1788 may not detect the Off-Hook condition for
DTMF Tones may also be sent using external
select phone instruments because some phone
circuitry via the voice injection port. See Schematic
instruments may not change the Off-Hook voltage
2.
sufficiently to allow detection.
There is also the possibility that two devices going
CALLER ID
Off-Hook simultaneously may defeat the PPU
The CH1788 will detect Caller ID (i.e., CID)
detection circuitry.
information. CID data, when supplied by the local
telephone service provider, is present between the
Recommendation.
To avoid a Failure To Detect
first and second ring signals.
Valid CID data is
condition, use of a prioritized scheme such as that
preceded by the “CID” designation. This feature is
employed in the 911 Priority Pick-Up application
enabled via register S95.
circuit described below is strongly suggested.
Setup. CID requires additional external circuitry. An
IMPORTANT NOTE
RC network must be added to the CH1788 V+ and V-
The Parallel Pick-Up feature should only be used in
pins.
See Schematic 4 for details.
Register S95
non-critical applications and never used as a
must be set to 8 (the default value) to receive the CID
substitute for the 911 Priority Pick-Up feature.
information.
Other caller ID options are available.
See the details of register S95.
911 PRIORITY PICK-UP
Operation. Using the circuit in Schematic 4, monitor
The 911 Priority Pick-Up (i.e., 911 PPU) feature
the RI pin for the period between the first and second
allows the CH1788 to give Off-Hook priority to any
ring signal. The decoded CID data will appear on
telephone sharing the PSTN line with the CH1788.
RXD.
Setup.
The 911 Priority Pick-Up feature requires
external circuitry. See Schematic 6.
LINE IN USE
The Line In Use (i.e., LIU) feature allows the CH1788
Operation. If a parallel connected phone instrument
to signal the host when a shared PSTN line is in use.
goes Off-Hook while the CH1788 is Off-Hook, the
When in use, the LINE IN USE status message will
CH1788 will immediately disconnect to give priority to
appear on RXD and the CH1788 will NOT go Off-
the phone instrument.
Hook. This feature is enabled via register S110.
2006 Cermetek Microelectronics, Inc.
Page 4
Document No. 607-0018 Revision A6 (01/06)
Cermetek Microelectronics, Inc.
CH1788 Surface Mount PLCC 2400bps Modem
CH1788
Top View
1
Used for LIU/911/General IO
22
2
A1
RXD
DTE Signal
Used for LIU/911/Audio Control
21
OH
GND
Power Input +5V
DTE Signal
3
RTS
V CC
20
DTE Signal
4
RI
S2
19
Optional S1/S2 Audio
DTE Signal
5
CTS
S1
18
Monitor/Tone/Voice
DTE Signal
6
DSR
DTE Signal
7
DCD
15
DTE Signal
8
DTR
V-
14
V+/V- Optional
Used for LIU/Detection
9
A2
V+
CID Input
DTE Signal
10
TXD
TIP
13
Telephone Line
Optional High Reset Input
11
RST
RING
12
Input
High Voltage Section
Figure 2. CH1788 Pin Configuration. See Table 2 for detailed Pin Descriptions.
Table 2.
CH1788 Pin Descriptions.
PIN
NAME
TYPE
FUNCTION
1
A1
O
Optional Input. Active high. Used when implementing the 911 Priority Pick-Up
circuit or the Line In Use circuit.
2
OH
O
Off-Hook. Active low. OH Indicates when the CH1788 is Off-Hook. Used in Line
In Use, 911 Priority Pick-Up applications and for Audio Control.
3
RTS
I
Request To Send . Active low. Used for optional flow control. Used in conjunction
with the Clear to Send (CTS) pin as a handshaking signal. See the details of
register S90.
4
RI
O
Ring Indication. Active low. For each occurrence of a valid ring signal, this pin will
pulse low for 70 ms. This output signal follows the frequency of the ringing signal
and is typically in the 20 to 40 Hz range with a cadence of 2 seconds on with 4
seconds off.
5
CTS
O
Clear to send. Active low. Used for optional flow control. Used in conjunction with
the Request To Send (RTS) pin as a handshaking signal.
6
DSR
O
Data Set Ready.
Active low. A low indicates that handshaking with the remote
modem is in progress and/or the carrier of the remote modem has been detected
and a valid connection is imminent as measured by DCD being active. This feature
is enabled with the N command.
7
DCD
O
Data Carrier Detect. Active low. This output must be enabled with the ATC1
command. When enabled, it will become active when both the originated and
answering modems are connected and a data carrier has been detected.
NOTE:
1. All unused pins should be left unconnected when not required in a specific application,
unless specifically directed otherwise.
2. See DC characteristics before attempting to drive an LED directly from the output of any pin.
2006 Cermetek Microelectronics, Inc.
Page 5
Document No. 607-0018 Revision A6 (01/06)
Cermetek Microelectronics, Inc.
CH1788 Surface Mount PLCC 2400bps Modem
Table 2.
CH1788 Pin Descriptions (Continued).
PIN
NAME
TYPE
FUNCTION
8
DTR
I
Data Terminal Ready. Active low. The response to this input is controlled by the
Rn command where n specifies the desired options and includes: returning the
modem to the command state, hanging up the modem, resetting the modem, and
placing the modem in zero power mode.
9
A2
I
Optional Input. Active low. Used when implementing the Line In Use circuit.
10
TXD
I
Transmit Data. Serial transmit data input. Data starts with a high to low transition.
Mark or binary 1 condition is indicated by HIGH.
11
RST
I
Reset. Active HIGH. This input must be asserted HIGH for at least 50 ms to reset
the modem.
The RST pin must be returned LOW for normal operation to
commence. If a system reset is not available, let this pin float to enable the internal
reset circuitry.
12
RING
I/O
Ring. Telephone connection requires an active public switched telephone line